Theoretically, with a FPGA you could have a crypto accelerator for any algorithm. There’d be some minor power consumption and significant chip area cost of that flexibility.
If a vendor wanted to make an expensive reprogrammable hardware encryption device they could see if it became popular. Maybe having the algorithm burned into silicon isn’t inherently bad, though, since if it were user-configurable, that would open up even more surface area for attacks. It’d also not be something I’d want to explain to my mom.
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Depends on the way it is programmed. On the contrary, it may be easier to audit than a baked-in-an-epoxy-blob chip you just have to trust.
It may also be a workaround for some crypto export crap, as then you can export blank chips and flash them (or their external config memory) offshore.
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